论文标题

Step-CIM:基于非易失性2D压电晶体管的内存中启用应变的三元精度计算

STeP-CiM: Strain-enabled Ternary Precision Computation-in-Memory based on Non-Volatile 2D Piezoelectric Transistors

论文作者

Thakuria, Niharika, Elangovan, Reena, Thirumala, Sandeep K, Raghunathan, Anand, Gupta, Sumeet K.

论文摘要

我们提出了针对三元深神经网络(DNNS)的2D压电FET(PEFET)基于计算的非易失性记忆。 PEFET由具有铁电和压电特性的材料与过渡金属二甲构基因通道相结合。我们利用(a)铁电性以极化(-p/+p)的形式存储二进制位(0/1),以及(b)偏振依赖性的压电性,通过菌株诱导的过渡金属二核基因通道中的菌株诱导的带状带变化来读取存储状态。 PEFET的独特读取机理使我们能够扩大具有低(高)电阻状态的 +P(-p)的传统关联,并根据读取电压扩大其双重高(低(低)电阻。具体而言,我们证明了PEFET中存储的 +P(-p)可以在(a)阳性读取电压的低(高)电阻状态以及(b)其双高(低(低)电阻状态的负读电压状态,而不会折磨读取干扰的情况下。这样的功能我们将其称为具有双电压极性(PIER)的极化保留的压电效应逆转,是PEFET所独有的,迄今尚未在迄今探索的记忆中显示。我们利用码头提出了一个具有应变的三元精度计算,内存(Step-CIM)单元,并具有计算存储重量和输入标量产物的能力,它们均以签名的三元精度表示。此外,使用继尺细胞的多单词线断言,我们可以对签名的三元输入和权重的点产物进行大规模平行的计算。我们的阵列水平分析表明,与基于SRAM和PEFET的近膜设计方法相比,内存多重和蓄积的操作的延迟降低了91%,并提高了15%和91%的能量。基于SRAM/PEFET的近调设计,Step-Cim的性能提高了8.91倍,能量平均提高了6.07倍。

We propose 2D Piezoelectric FET (PeFET) based compute-enabled non-volatile memory for ternary deep neural networks (DNNs). PeFETs consist of a material with ferroelectric and piezoelectric properties coupled with Transition Metal Dichalcogenide channel. We utilize (a) ferroelectricity to store binary bits (0/1) in the form of polarization (-P/+P) and (b) polarization dependent piezoelectricity to read the stored state by means of strain-induced bandgap change in Transition Metal Dichalcogenide channel. The unique read mechanism of PeFETs enables us to expand the traditional association of +P (-P) with low (high) resistance states to their dual high (low) resistance depending on read voltage. Specifically, we demonstrate that +P (-P) stored in PeFETs can be dynamically configured in (a) a low (high) resistance state for positive read voltages and (b) their dual high (low) resistance states for negative read voltages, without afflicting a read disturb. Such a feature, which we name as Polarization Preserved Piezoelectric Effect Reversal with Dual Voltage Polarity (PiER), is unique to PeFETs and has not been shown in hitherto explored memories. We leverage PiER to propose a Strain-enabled Ternary Precision Computation-in-Memory (STeP-CiM) cell with capabilities of computing the scalar product of the stored weight and input, both of which are represented with signed ternary precision. Further, using multi word-line assertion of STeP-CiM cells, we achieve massively parallel computation of dot products of signed ternary inputs and weights. Our array level analysis shows 91% lower delay and improvements of 15% and 91% in energy for in-memory multiply-and-accumulate operations compared to near-memory design approaches based on SRAM and PeFET respectively. STeP-CiM exhibits upto 8.91x improvement in performance and 6.07x average improvement in energy over SRAM/PeFET based near-memory design.

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